The invention relates generally to the field of semiconductors and, more specifically, to a technique for selecting an optimal quantization direction for a given transport direction in a semiconductor device such as a field effect transistor (FET), a method for preparing a wafer for fabricating such a semiconductor device, and the semiconductor device fabricated by the method.
It is known that FET performance varies with crystallographic direction. See M. Yang et al., “High Performance CMOS Fabricated On Hybrid Substrate With Different Crystal Orientations,” IEDM Tech. Digest, 2003, p. 453–456. In the case of Ge nFETs, the commonly held belief is that the best performance is obtained for transport in the [1 1 0] direction, with quantization in the [{overscore (1)} 1 0] direction. See T. Low et al., “Investigation of Performance Limits of Germanium Double-Gated MOSFETs,” International Electron Devices Meeting (IEDM), p. 691–694, December 2003, incorporated herein by reference. Low, et al. modeled Ge DGFETs in a few crystallographic directions of high symmetry and concluded the best combination of high quantization mass and low transport mass occurred for transport in the [1 1 0] and quantization in the [{overscore (1)} 1 0] direction.